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| (R) EMIF02-SPK01F2 IPADTM 2 LINE EMI FILTER AND ESD PROTECTION MAIN PRODUCT CHARACTERISTICS: Where EMI filtering in ESD sensitive equipment is required : Mobile phones and communication systems Computers, printers and MCU Boards DESCRIPTION The EMIF02-SPK01 is a highly integrated device designed to suppress EMI/RFI noise in all systems subjected to electromagnetic interferences. The EMIF02 Flip-Chip packaging means the package size is equal to the die size. This filter includes an ESD protection circuitry which prevents damage to the application when subjected to ESD surges up 15 kV. BENEFITS EMI symmetrical (I/O) low-pass filter High efficiency in EMI filtering Very low PCB space consuming: 1.07 mm x 1.47 mm Very thin package: 0.65 mm High efficiency in ESD suppression High reliability offered by monolithic integration High reducing of parasitic elements through integration & wafer level packaging COMPLIES WITH THE FOLLOWING STANDARDS: IEC 61000-4-2 Level 4 on input pins 15 kV (air discharge) 8 kV (contact discharge) Level 1 on output pins 2 kV (air discharge) 2 kV (contact discharge) MIL STD 883E -Method 3015-6 Class 3 Figure 2: Basic Cell Configuration Flip-Chip (5 Bumps) Table 1: Order Code Part Number EMIF02-SPK01F2 Marking FX Figure 1: Pin Configuration (bump side) 321 I2 GND O2 O1 I1 A B C Low-pass Filter Input Output Ri/o = 10 Cline = 200 pF GND TM: IPAD is a trademark of STMicroelectronics. GND GND October 2005 REV 1 1/7 EMIF02-SPK01F2 Table 2: Absolute Ratings (limiting values) Symbol Tj Top Tstg Parameter and test conditions Maximum junction temperature Operating temperature range Storage temperature range Value 125 - 40 to + 85 - 55 to 50 Unit C C C Table 3: Electrical Characteristics (Tamb = 25 C) Symbol VBR IRM VRM VCL Rd IPP RI/O Cline Symbol VBR IRM RI/O Cline IR = 1 mA VRM = 3 V per line Tolerance 20 % VR = 0 V 10 200 Parameter Breakdown voltage Leakage current @ VRM Stand-off voltage Clamping voltage Dynamic impedance Peak pulse current Series resistance between Input & Output Input capacitance per line Test conditions Min. 6 Typ. 8 500 Max. Unit V nA pF IPP VCL VBR VRM IR IRM IRM IR VRM VBR VCL V I IPP Figure 3: S21 (dB) attenuation measurements and Aplac simulation 0.00 dB -5.00 Figure 4: Analog crosstalk measurements 0.00 dB -10.00 -10.00 -20.00 -15.00 -20.00 -25.00 -30.00 -40.00 -30.00 -50.00 -35.00 -40.00 100.0k 1.0M 10.0M f/Hz 100.0M 1.0G -60.00 100.0k 1.0M 10.0M f/Hz 100.0M 1.0G 2/7 EMIF02-SPK01F2 Figure 5: ESD response to IEC61000-4-2 (+ 15kV air discharge) on one input V(in) and one output V(out) Figure 6: ESD response to IEC61000-4-2 (15kV air discharge) on one input V(in) and one output V(out) Figure 7: Line capacitance versus applied voltage C(pF) 250 F=1MHz Vosc=30mVRMS Tj=25C 200 150 100 50 VR(V) 0 0 1 2 3 4 5 3/7 EMIF02-SPK01F2 Figure 8: Aplac model IN1 Rbump Lbump Rspk Lspk Lbump Rbump OUT1 model = D1 model = D2 Rsub GND Lsub GND model = D3 Rbump Lbump model = D1 model = D2 Cgnd Lgnd Rgnd IN2 Rbump Lbump Rspk Lspk Lbump Rbump OUT2 EMIF02-SPK01F1 model Ground return Figure 9: Aplac parameters Model D1 CJO=Cdiode1 BV=7 IBV=1u IKF=1000 IS=10f ISR=100p N=1 M=0.3333 RS=0.7 VJ=0.6 TT=50n Model D3 CJO=Cdiode3 BV=7 IBV=1u IKF=1000 IS=10f ISR=100p N=1 M=0.3333 RS=0.12 VJ=0.6 TT=50n Model D2 CJO=Cdiode2 BV=7 IBV=1u IKF=1000 IS=10f ISR=100p N=1 M=0.3333 RS=0.3 VJ=0.6 TT=50n aplacvar Ls 1nH aplacvar Rs 150m aplacvar Rspk 10 aplacvar Lspk 10p aplacvar Cdiode1 234pF aplacvar Cdiode2 3.5ppF aplacvar Cdiode3 1nF aplacvar Lbump 50pH aplacvar Rbump 10m aplacvar Rsub 0.5m aplacvar Lsub 10pH aplacvar Rgnd 1m aplacvar Lgnd 50pH aplacvar Cgnd 0.15pF 4/7 EMIF02-SPK01F2 Figure 10: Order code EMIF EMI Filter Number of lines Information x = resistance value (Ohms) z = capacitance value / 10(pF) or 3 letters = application 2 digits = version Package F = Flip-Chip x = 1: 500m, Bump = 315m = 2: Leadfree Pitch = 500m, Bump = 315m yy - xxx zz Fx Figure 11: FLIP-CHIP Package Mechanical Data 500m 10 250m 10 315m 50 650m 50 50 0 1.07mm 50m Figure 12: Foot print recommendations 1.47mm 50m m 15 Figure 13: Marking Dot, ST logo xx = marking z = manufacturing location yww = datecode (y = year ww = week) Copper pad Diameter : 250m recommended , 300m max E Solder stencil opening : 330m Solder mask opening recommendation : 340m min for 315m copper pad diameter xxz y ww 5/7 EMIF02-SPK01F2 Figure 14: FLIP-CHIP Tape and Reel Specification Dot identifying Pin A1 location 8 0.3 ST E xxz yww ST E xxz yww ST E xxz yww 0.73 0.05 4 0.1 All dimensions in mm User direction of unreeling In order to meet environmental requirements, ST offers these devices in ECOPACK(R) packages. These packages have a Lead-free second level interconnect . The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. Table 4: Ordering Information Ordering code EMIF02-SPK01F2 Marking FX Package Flip-Chip Weight 2.1 mg Base qty 5000 Delivery mode Tape & reel (7") Note: More packing informations are available in the application notes AN1235: ''Flip-Chip: Package description and recommandations for use'' AN1751: "EMI Filters: Recommendations and measurements" Table 5: Revision History Date 14-Oct-2004 Revision 1 First issue Description of Changes 6/7 3.5 0.1 1.75 0.1 4 0.1 O 1.5 0.1 EMIF02-SPK01F2 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners (c) 2005 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com 7/7 |
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